The present invention relates to transistors, and more specifically, to implantation formed metal-insulator-semiconductor (MIS) contacts in transistors.
A field effect transistor (FET) generally includes three terminals: a source, a drain, and a gate. A critical factor in the performance of a FET is the external source-drain resistance (Rext) or the resistance at the source and drain contacts. Silicide (silicon bonded to metal) has been used for the source and drain contacts, but silicide contact resistance is a significant contributor to Rext. Metal-insulator-semiconductor (MIS) contacts have been considered as an alternative to silicide. MIS contacts are formed by depositing an insulating layer between the source and drain contacts and the respective source and drain regions. In theory, MIS contacts provide lower resistance based on a thin enough insulating layer.